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EDA Tool Engineer

Description

Job Description

As part of the Corporate R&D Design Enablement department we are responsible for the evaluation, acquisition, development, integration and support of design tools and methodologies towards the worldwide BU development teams. We are looking for a functional verification specialist that can strengthen our abilities in the mixed-signal and digital design space. We are offering a position that includes responsibilities such as:

  • Influence EDA vendors’ developments on the features, performance and quality of their functional verification tools.
  • Establish new tools and methodologies increasing the quality of ON Semiconductor’s products.
  • Continuously make propositions to improve EDA tools environment and methodologies in order to improve designer productivity and satisfaction level.
  • Support the worldwide design community in using external EDA tools and internally developed scripts and tools.
  • We offer you:

  • Working in a dynamic, newly formed team in challenging international environment
  • Annual bonus – 50% of the basic monthly basic salary
  • Motivating annual corporate financial bonus on the basis of the company's economic results
  • Competitive and performance-related salary dependent on your professional and personal qualification
  • Flexible working hours
  • Extra days of holiday
  • Meal card with €4,50 voucher per working day. Employee pays 1,03 Euro
  • Relocation bonus and travel allowance
  • Pension - Company Contribution 3% of gross base salary
  • Professional training and career opportunities
  • Teambuilding and company’s events
  • Starting salary from 2 500 EUR - depend on experience
  • Qualifications

  • MS degree or equivalent by experience in Electrical Engineering, Computer Science or related field
  • 5+ years of functional verification expertise (architect, designer, project lead, etc.)
  • Experience with functional verification tools (analog, digital & mixed-signal simulation; aging/reliability/ESD/SOA/… simulation; simulation environments; …) from EDA vendors such as Cadence, Mentor, Synopsys …
  • Expertise in SystemVerilog & UVM based verification methodology
  • Experience with Verilog-A, Verilog-AMS and SystemVerilog behavioral modelling languages
  • Experience with Linux as a user environment
  • Affinity with programming & scripting languages such as Perl, Bash, TCL, Python, QT, C, C++…
  • Having experience with revision controlled development environments (SVN, Cliosoft)
  • Excellent analytical and problem-solving skills
  • A team player with excellent communication skills – verbal and written
  • Fluent in English
  • EDA Tool Engineer

    ON Semiconductor, Mechelen
    Electrical Engineer, Electrical Engineer, Design Engineer, Kwaliteit , Quality Engineer, R&D Engineer, Ingenieur, Developer, Project Manager